SOC_TEST_SEL=00, RADIO_DFT_MODE=0000, LFSR_LENGTH=000, DFT_CLK_SEL=000
TX Digital Control
| RADIO_DFT_MODE | Radio DFT Modes 0 (0000): Normal Radio Operation, DFT not engaged. 1 (0001): Carrier Frequency Only 2 (0010): Pattern Register GFSK 3 (0011): LFSR GFSK 4 (0100): Pattern Register FSK 5 (0101): LFSR FSK 6 (0110): Pattern Register O-QPSK 7 (0111): LFSR O-QPSK 8 (1000): LFSR 802.15.4 Symbols 9 (1001): PLL Modulation from RAM 10 (1010): PLL Coarse Tune BIST 11 (1011): PLL Frequency Synthesizer BIST 12 (1100): High Port DAC BIST 13 (1101): VCO Frequency Meter |
| LFSR_LENGTH | LFSR Length 0 (000): LFSR 9, tap mask 100010000 1 (001): LFSR 10, tap mask 1001000000 2 (010): LFSR 11, tap mask 11101000000 3 (011): LFSR 13, tap mask 1101100000000 4 (100): LFSR 15, tap mask 111010000000000 5 (101): LFSR 17, tap mask 11110000000000000 |
| LFSR_EN | LFSR Enable |
| DFT_CLK_SEL | DFT Clock Selection 0 (000): 62.5 kHz 1 (001): 125 kHz 2 (010): 250 kHz 3 (011): 500 kHz 4 (100): 1 MHz 5 (101): 2 MHz 6 (110): 4 MHz 7 (111): RF OSC Clock |
| TX_DFT_EN | DFT Modulation Enable |
| SOC_TEST_SEL | Radio Clock Selector for SoC RF Clock Tests 0 (00): No Clock Selected 1 (01): PLL Sigma Delta Clock, divided by 2 2 (10): Auxiliary PLL Clock, divided by 2 3 (11): RF Ref Osc clock, divided by 2 |
| TX_CAPTURE_POL | Polarity of the Input Data for the Transmitter |
| FREQ_WORD_ADJ | Frequency Word Adjustment |